Width Safety
All literals must be explicitly sized. Implicit truncation and extension are compile errors. Silent overflow and bit-loss are impossible to express.
JZ-HDL
Hardware Correctness by Construction
All literals must be explicitly sized. Implicit truncation and extension are compile errors. Silent overflow and bit-loss are impossible to express.
Every assignable signal is written at most once per execution path. Multiple-driver bugs, priority conflicts, and race conditions are caught at compile time.
Registers are bound to a single clock domain. Cross-domain reads require explicit CDC declarations. Metastability bugs cannot reach synthesis.
If it compiles, the hardware is valid. No x propagation to observable sinks, no floating nets, no combinational loops, no unsized literals.